Sigma-delta (ΣΔ) modulators are employed in analogue-to-digital converters (ADCs). U.S. Pat. No. 6,404,368 discloses in FIG. 3 and its accompanying text a ΣΔ modulator to be used in an over-sampling type ADC, which includes an analogue ΣΔ modulator coupled to a digital ΣΔ modulator. The analogue ΣΔ modulator includes a digital-to-analogue converter (DAC) which converts a one-bit feed-back signal to an analogue signal, an analogue adder or subtractor which calculates a difference between an output signal transmitted from the DAC and an analogue input signal. The analogue ΣΔ modulator also has an analogue integrator, which integrates output signals transmitted from the analogue adder or subtractor, and a first quantizer which converts an output signal transmitted from the analogue integrator, into a digital signal. The digital ΣΔ modulator includes a digital adder or subtractor which calculates a difference between an output signal transmitted from the first quantizer and the one-bit feed-back signal, a digital integrator which integrates output signals transmitted from the digital adder or subtractor, a second quantizer which converts an output signal transmitted from the digital integrator into a one-bit digital signal, and a delay element which delays the one-bit digital signal transmitted from the second quantizer and feeds the thus delayed signal back as the one-bit feed-back signal. Since the feedback signal transmitted to the analogue modulator is a one-bit signal, distortion caused by non-linearity error of the DAC can be reduced.